1055 search results - page 170 / 211 » A system level perspective on branch architecture performanc... |
ICPPW
1999
IEEE
14 years 29 days ago
1999
IEEE
We present a new multiple ring network for multiprocessors, called the Multistage Ring Network(MRN). The MRN has a 2-level hierarchy of register insertion rings, and its interconn...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is exacerbated by high-level design automation tools that ignore increasingly impo...
FOCI
2007
IEEE
14 years 3 months ago
2007
IEEE
Recent progress in genomics and proteomics makes it possible to understand the biological networks at the systems level. We aim to develop computational models of learning and memo...
CODES
2004
IEEE
14 years 12 days ago
2004
IEEE
Single chip heterogeneous multiprocessors are arising to meet the computational demands of portable and handheld devices. These computing systems are not fully custom designs trad...
IPPS
2010
IEEE
13 years 6 months ago
2010
IEEE
Abstract--The growing complexity in computer system hierarchies due to the increase in the number of cores per processor, levels of cache (some of them shared) and the number of pr...