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» A tale of two synchronizing clocks
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ICCD
1996
IEEE
134views Hardware» more  ICCD 1996»
14 years 3 months ago
Pausible Clocking: A First Step Toward Heterogeneous Systems
This paper describes a novel communication scheme, which is guaranteed to be free of synchronization failures, amongst multiple synchronous modules operating independently. In thi...
Kenneth Y. Yun, Ryan P. Donohue
TCAD
2002
91views more  TCAD 2002»
13 years 10 months ago
Retiming and clock scheduling for digital circuit optimization
Abstract--This paper investigates the application of simultaneous retiming and clock scheduling for optimizing synchronous circuits under setup and hold constraints. Two optimizati...
Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman
PODC
2009
ACM
14 years 11 months ago
Tight bounds for clock synchronization
d Abstract] Christoph Lenzen Computer Engineering and Networks Laboratory (TIK) ETH Zurich, 8092 Zurich, Switzerland lenzen@tik.ee.ethz.ch Thomas Locher Computer Engineering and N...
Christoph Lenzen, Thomas Locher, Roger Wattenhofer
FPL
2003
Springer
136views Hardware» more  FPL 2003»
14 years 4 months ago
FPGAs for High Accuracy Clock Synchronization over Ethernet Networks
This article describes the architecture and implementation of two systems on a programmable chip, which support high accuracy clock synchronization over Ethernet networks. The netw...
Roland Höller
IMC
2004
ACM
14 years 4 months ago
Robust synchronization of software clocks across the internet
Accurate, reliable timestamping which is also convenient and inexpensive is needed in many important areas including real-time network applications and network measurement. Recent...
Darryl Veitch, Satish Babu Korada, Attila Pá...