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DATE
2008
IEEE
106views Hardware» more  DATE 2008»
14 years 1 months ago
Source-Level Timing Annotation and Simulation for a Heterogeneous Multiprocessor
A generic and retargetable tool flow is presented that enables the export of timing data from software running on a cycle-accurate Virtual Prototype (VP) to a concurrent function...
Trevor Meyerowitz, Alberto L. Sangiovanni-Vincente...
TVLSI
2008
187views more  TVLSI 2008»
13 years 7 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
KRMED
2008
13 years 9 months ago
Essential SNOMED: Simplifying SNOMED-CT and supporting Integration with Health Information Models
SNOMED CT (SCT) has been designed and implemented in an era when health computer systems generally required terminology representations in the form of singular precoordinated conc...
Peter MacIsaac, Donald Walker, Rachel L. Richesson...
DSD
2004
IEEE
129views Hardware» more  DSD 2004»
13 years 11 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
BMCBI
2010
176views more  BMCBI 2010»
13 years 4 months ago
Haplotype association analyses in resources of mixed structure using Monte Carlo testing
Background: Genomewide association studies have resulted in a great many genomic regions that are likely to harbor disease genes. Thorough interrogation of these specific regions ...
Ryan Abo, Jathine Wong, Alun Thomas, Nicola J. Cam...