563 search results - page 11 / 113 » A theory-based alternative for the design of instruction: fu... |
DAC
2005
ACM
13 years 9 months ago
2005
ACM
Parallelism in processor architecture and design imposes a verification challenge as the exponential growth in the number of execution combinations becomes unwieldy. In this paper...
FDL
2003
IEEE
14 years 1 months ago
2003
IEEE
SystemC-Plus from the ODETTE project provides the ability to simulate and synthesise object-oriented specifications into hardware. The current ODETTE compiler translates each obj...
AAMAS
2011
Springer
13 years 2 months ago
2011
Springer
Abstract. The central question in mechanism design is how to implement a given social choice function. One of the most studied concepts is that of truthful implementations in which...
ICCAD
1996
IEEE
13 years 12 months ago
1996
IEEE
Functional simulation is the most widely used method for design verification. At various levels of abstraction, e.g., behavioral, register-transfer level and gate level, the design...
PDCN
2007
13 years 9 months ago
2007
This paper describes the design and evaluation of an auto-memoization processor. The major point of this proposal is to detect the multilevel functions and loops with no additiona...