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ECRTS
2007
IEEE
14 years 4 months ago
Predictable Paging in Real-Time Systems: A Compiler Approach
Conventionally, the use of virtual memory in real-time systems has been avoided, the main reason being the difficulties it provides to timing analysis. However, there is a trend ...
Isabelle Puaut, Damien Hardy
VLSID
2008
IEEE
151views VLSI» more  VLSID 2008»
14 years 10 months ago
Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip
Worst-case execution time (WCET) analysis and, in general, the predictability of real-time applications implemented on multiprocessor systems has been addressed only in very restri...
Alexandru Andrei, Petru Eles, Zebo Peng, Jakob Ros...
RTAS
1997
IEEE
14 years 2 months ago
OS-Controlled Cache Predictability for Real-Time Systems
3rd IEEE Real-time Technology and Applications Symposium (RTAS), June 1997 in Montreal, Canada Cache-partitioning techniques have been invented to make modern processors with an e...
Jochen Liedtke, Hermann Härtig, Michael Hohmu...
HPCC
2007
Springer
14 years 4 months ago
Parallel Performance Prediction for Multigrid Codes on Distributed Memory Architectures
We propose a model for describing the parallel performance of multigrid software on distributed memory architectures. The goal of the model is to allow reliable predictions to be m...
Giuseppe Romanazzi, Peter K. Jimack
RTCSA
1999
IEEE
14 years 2 months ago
Pipeline Timing Analysis Using a Trace-Driven Simulator
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...
Jakob Engblom, Andreas Ermedahl