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GLVLSI
2003
IEEE
194views VLSI» more  GLVLSI 2003»
14 years 28 days ago
RF CMOS circuit optimizing procedure and synthesis tool
In this paper, we discuss a methodology to design and synthesize analog CMOS components such as RF amplifiers. The inputs of the synthesis tool are the circuit specifications desc...
Chandrasekar Rajagopal, Karthik Sridhar, Adrian Nu...
ICCAD
2010
IEEE
140views Hardware» more  ICCAD 2010»
13 years 5 months ago
Reduction of interpolants for logic synthesis
Craig Interpolation is a state-of-the-art technique for logic synthesis and verification, based on Boolean Satisfiability (SAT). Leveraging the efficacy of SAT algorithms, Craig In...
John D. Backes, Marc D. Riedel
ATVA
2007
Springer
111views Hardware» more  ATVA 2007»
14 years 1 months ago
Timed Control with Observation Based and Stuttering Invariant Strategies
In this paper we consider the problem of controller synthesis for timed games under imperfect information. Novel to our approach is the requirements to strategies: they should be b...
Franck Cassez, Alexandre David, Kim Guldstrand Lar...
EURODAC
1995
IEEE
126views VHDL» more  EURODAC 1995»
13 years 11 months ago
Timing optimization by bit-level arithmetic transformations
This paper describes a method to optimize the performance of data paths. It is based on bit-level arithmetic transformations, and is especially suited to optimize large adder stru...
Luc Rijnders, Zohair Sahraoui, Paul Six, Hugo De M...
DRM
2007
Springer
14 years 1 months ago
Slicing obfuscations: design, correctness, and evaluation
The goal of obfuscation is to transform a program, without affecting its functionality, such that some secret information within the program can be hidden for as long as possible...
Anirban Majumdar, Stephen Drape, Clark D. Thombors...