277 search results - page 19 / 56 » A transformation based algorithm for reversible logic synthe... |
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
In this paper, we present a method for generating checker circuits from sequential-extended regular expressions (SEREs). Such sequences form the core of increasingly-used Assertion...
MCAM
2007
Springer
14 years 1 months ago
2007
Springer
This paper proposes a scheme to detect and locate the players and the ball on the grass playfield in soccer videos. We put forward a shape analysisbased approach to identify the pl...
ICCAD
1995
IEEE
13 years 11 months ago
1995
IEEE
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
LPNMR
1997
Springer
13 years 11 months ago
1997
Springer
We present a bottom-up algorithm for the computation of the well-founded model of non-disjunctive logic programs which is based on the set of elementary program transformations stu...