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DATE
1999
IEEE
13 years 12 months ago
1999
IEEE
Different logic synthesis tasks have been formulated as input encoding problems but restricted to use a minimum number of binary variables. This paper presents an original column ...
CIIA
2009
13 years 8 months ago
2009
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...
ISCI
2007
13 years 7 months ago
2007
We define the Lukasiewicz transform as a residuated map and a homomorphism between semimodules over the semiring reducts of an MV-algebra. Then we describe the “Lukasiewicz Tra...
JANCL
2008
13 years 7 months ago
2008
ABSTRACT. In [CON 06b] we introduced the algorithm SQEMA for computing first-order equivalents and proving canonicity of modal formulae, and thus established a very general corresp...
ASPDAC
2004
ACM
14 years 1 months ago
2004
ACM
— In many verification tools methods for functional simulation based on reduced ordered Binary Decision Diagrams (BDDs) are used. The evaluation time for a BDD can be crucial an...