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DATE
1999
IEEE
123views Hardware» more  DATE 1999»
15 years 9 months ago
An Algorithm for Face-Constrained Encoding of Symbols Using Minimum Code Length
Different logic synthesis tasks have been formulated as input encoding problems but restricted to use a minimum number of binary variables. This paper presents an original column ...
Manuel Martínez, Maria J. Avedillo, Jos&eac...
CIIA
2009
15 years 6 months ago
Physical Synthesis for CPLD Architectures
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...
Sid-Ahmed Senouci
ISCI
2007
115views more  ISCI 2007»
15 years 5 months ago
Lukasiewicz transform and its application to compression and reconstruction of digital images
We define the Lukasiewicz transform as a residuated map and a homomorphism between semimodules over the semiring reducts of an MV-algebra. Then we describe the “Lukasiewicz Tra...
Antonio di Nola, Ciro Russo
JANCL
2008
170views more  JANCL 2008»
15 years 5 months ago
Algorithmic correspondence and completeness in modal logic
ABSTRACT. In [CON 06b] we introduced the algorithm SQEMA for computing first-order equivalents and proving canonicity of modal formulae, and thus established a very general corresp...
Willem Conradie, Valentin Goranko
148
Voted
ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
15 years 10 months ago
Minimization of the expected path length in BDDs based on local changes
— In many verification tools methods for functional simulation based on reduced ordered Binary Decision Diagrams (BDDs) are used. The evaluation time for a BDD can be crucial an...
Rüdiger Ebendt, Wolfgang Günther, Rolf D...