Sciweavers

617 search results - page 45 / 124
» A unified language processing methodology
Sort
View
FDL
2007
IEEE
15 years 10 months ago
Automatic High Level Assertion Generation and Synthesis for Embedded System Design
SystemVerilog encapsulates both design description and verification properties in one language and provides a unified environment for engineers who have the formidable challenge o...
Lun Li, Frank P. Coyle, Mitchell A. Thornton
OOIS
2001
Springer
15 years 8 months ago
Ontology Modeling Using UML
Ontology is a comprehensive knowledge model which enables the developer to practice a “higher” level of reuse of knowledge. Typically, different modeling languages are employe...
Xin Wang, Christine W. Chan
PROCEDIA
2010
103views more  PROCEDIA 2010»
14 years 10 months ago
Towards generating optimised finite element solvers for GPUs from high-level specifications
We argue that producing maintainable high-performance implementations of finite element methods for multiple targets requires that they are written using a high-level domain-speci...
Graham R. Markall, David A. Ham, Paul H. J. Kelly
ECWEB
2005
Springer
187views ECommerce» more  ECWEB 2005»
15 years 9 months ago
Improving Reuse of Web Service Compositions
We describe a methodology for assembling composite services based on three basic processes which are independent of the concrete implementation: Abstraction Process, Service Compos...
Carlos Granell, Michael Gould, Roy Grønmo, ...
DATE
2010
IEEE
176views Hardware» more  DATE 2010»
15 years 9 months ago
Timing modeling and analysis for AUTOSAR-based software development - a case study
—Safety-critical automotive systems must fulfill hard real-time constraints for reliability and safety. This paper presents a case study for the application of an AUTOSARbased l...
Kay Klobedanz, Christoph Kuznik, Andreas Thuy, Wol...