In this paper, we propose a new sensitivity based, statistical gate sizing method. Since circuit optimization effects the entire shape of the circuit delay distribution, it is dif...
Aseem Agarwal, Kaviraj Chopra, David Blaauw, Vladi...
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Log-polar imaging is an important topic in space-variant active vision, and facilitates some visual tasks. Translation estimation, though essential for active tracking, is more diï...
This paper introduces a new algorithm, Q2, foroptimizingthe expected output ofamultiinput noisy continuous function. Q2 is designed to need only a few experiments, it avoids stron...
Andrew W. Moore, Jeff G. Schneider, Justin A. Boya...
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...