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» ADOPT: An Approach to Activity Based Delay Optimization
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DAC
2005
ACM
13 years 9 months ago
Circuit optimization using statistical static timing analysis
In this paper, we propose a new sensitivity based, statistical gate sizing method. Since circuit optimization effects the entire shape of the circuit delay distribution, it is dif...
Aseem Agarwal, Kaviraj Chopra, David Blaauw, Vladi...
DATE
2000
IEEE
142views Hardware» more  DATE 2000»
13 years 11 months ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi
CAIP
2001
Springer
127views Image Analysis» more  CAIP 2001»
13 years 12 months ago
An Optimization Approach for Translational Motion Estimation in Log-Polar Domain
Log-polar imaging is an important topic in space-variant active vision, and facilitates some visual tasks. Translation estimation, though essential for active tracking, is more diï...
V. Javier Traver, Filiberto Pla
ICML
1998
IEEE
14 years 8 months ago
Q2: Memory-Based Active Learning for Optimizing Noisy Continuous Functions
This paper introduces a new algorithm, Q2, foroptimizingthe expected output ofamultiinput noisy continuous function. Q2 is designed to need only a few experiments, it avoids stron...
Andrew W. Moore, Jeff G. Schneider, Justin A. Boya...
IJCSS
2007
133views more  IJCSS 2007»
13 years 7 months ago
Synthesis of Read-Once Digital Hardware with Reduced Energy Delay Product
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...
P. Balasubramanian, S. Theja