115 search results - page 13 / 23 » AFTA: A Formal Delay Model for Functional Timing Analysis |
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
ISCAS
2003
IEEE
14 years 1 months ago
2003
IEEE
We propose an algorithm based on singular value decomposition (SVD) to reduce the number of process variation variables. With few process variation variables, fault simulation and...
INTEGRATION
2002
13 years 7 months ago
2002
Booth Recoding is a commonly used technique to recode one of the operands in binary multiplication. In this way the implementation of a multipliers' adder tree can be improve...
ICC
2007
IEEE
14 years 2 months ago
2007
IEEE
— In this paper, we present an analytical method to evaluate the bit error rate (BER) of the ultra-wideband (UWB) system in the IEEE 802.15.4a standardized channel model. The IEE...
DFG
2004
Springer
13 years 11 months ago
2004
Springer
Programmable Logic Controllers (PLC) are widespread in the manufacturing and processing industries to realize sequential procedures and to avoid safety-critical states. For the spe...