In this paper, we propose a practical and efficient technique, Forecaster, to estimate (1) the end-to-end available bandwidth, and (2) the speed of the most congested (tight) link ...
Mradula Neginhal, Khaled Harfoush, Harry G. Perros
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
This paper proposes a novel graph matching algorithm based on skeletons and applies it to shape recognition based on object silhouettes. The main idea is to match the critical poin...
We present an algorithm for identifyinga set of faults that do not have to be targeted by a sequential delay fault test generator. These faults either cannot independently aect th...
Angela Krstic, Srimat T. Chakradhar, Kwang-Ting Ch...
This paper presents two schemes for the implementation of high performance and low power FIR filtering Intellectual Property (IP) cores. Low power is achieved through the utilizat...