Sciweavers

204 search results - page 4 / 41
» Abstract Simulators for the DSDE Formalism
Sort
View
FDL
2004
IEEE
13 years 11 months ago
The Formal Simulation Semantics of SystemVerilog
We present a rigorous but transparent semantics definition of SystemVerilog that covers processes with blocking and non-blocking statements as well as their interaction with the s...
Martin Zambaldi, Wolfgang Ecker, T. Kruse, W. M&uu...
CAV
2008
Springer
125views Hardware» more  CAV 2008»
13 years 9 months ago
Application of Formal Word-Level Analysis to Constrained Random Simulation
Abstract. Constrained random simulation is supported by constraint solvers integrated within simulators. These constraint solvers need to be fast and memory efficient to maintain s...
Hyondeuk Kim, HoonSang Jin, Kavita Ravi, Petr Spac...
TC
1998
13 years 7 months ago
Abstraction Techniques for Validation Coverage Analysis and Test Generation
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Ho...
ITS
2004
Springer
123views Multimedia» more  ITS 2004»
14 years 24 days ago
Combining Heuristics and Formal Methods in a Tool for Supporting Simulation-Based Discovery Learning
Abstract. This paper describes the design of a tool to support learners in simulation-based discovery learning environments. The design redesigns and extents a previous tool to ove...
Koen Veermans, Wouter R. van Joolingen
SAFECOMP
2010
Springer
13 years 5 months ago
Experiences in Applying Formal Verification in Robotics
Formal verification efforts in the area of robotics are still comparatively scarce. In this paper we report on our experiences with one such effort, which was concerned with design...
Dennis Walter, Holger Täubig, Christoph L&uum...