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IESS
2009
Springer
182views Hardware» more  IESS 2009»
13 years 5 months ago
Modeling Cache Effects at the Transaction Level
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
Ardavan Pedram, David Craven, Andreas Gerstlauer
DSD
2006
IEEE
110views Hardware» more  DSD 2006»
14 years 1 months ago
A Flexible, Syntax Independent Representation (SIR) for System Level Design Models
System Level Design (SLD) is widely seen as a solution for bridging the gap between chip complexity and design productivity of Systems on Chip (SoC). SLD relieves the designer fro...
Ines Viskic, Rainer Dömer
VLSID
2003
IEEE
253views VLSI» more  VLSID 2003»
14 years 8 months ago
High Level Synthesis from Sim-nML Processor Models
The design of modern complex embedded systems require a high level of abstraction of the design. The SimnML[1] is a specification language to model processors for such designs. Se...
Souvik Basu, Rajat Moona
IESA
2007
13 years 9 months ago
Business Level Service-Oriented Enterprise Application Integration
In this paper we propose a new approach for service-oriented enterprise application integration (EAI). Unlike current EAI solutions, which mainly focus on technological aspects, ou...
Stanislav Pokraev, Dick A. C. Quartel, Maarten W. ...
VMCAI
2009
Springer
14 years 2 months ago
A Scalable Memory Model for Low-Level Code
Abstract. Because of its critical importance underlying all other software, lowlevel system software is among the most important targets for formal verification. Low-level systems...
Zvonimir Rakamaric, Alan J. Hu