229 search results - page 2 / 46 » Accelerating SIFT on parallel architectures |
ICANN
2010
Springer
13 years 8 months ago
2010
Springer
Training convolutional neural networks (CNNs) on large sets of high-resolution images is too computationally intense to be performed on commodity CPUs. Such architectures however ...
TCSV
2008
13 years 7 months ago
2008
Abstract--This paper proposes a parallel hardware architecture for image feature detection based on the SIFT (Scale Invariant Feature Transform) algorithm and applied to the SLAM (...
IEEEPACT
2005
IEEE
14 years 28 days ago
2005
IEEE
While general-purpose processors have only recently employed chip multiprocessor (CMP) architectures, network processors (NPs) have used heterogeneous multi-core architectures sin...
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
HMMer is a widely-used bioinformatics software package that uses profile HMMs (Hidden Markov Models) to model the primary structure consensus of a family of protein or nucleic aci...
ASAP
2006
IEEE
14 years 1 months ago
2006
IEEE
Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a stat...