229 search results - page 39 / 46 » Accelerating SIFT on parallel architectures |
APVIS
2007
13 years 10 months ago
2007
: In this paper, we apply Particle-based Volume Rendering (PBVR) technique using a current programmable GPU architecture. Recently, the increasing programmability of GPU offers an ...
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
DAC
2005
ACM
13 years 10 months ago
2005
ACM
In this paper we present the impact of dynamically translating any sequence of instructions into combinational logic. The proposed approach combines a reconfigurable architecture ...
FCCM
2006
IEEE
14 years 2 months ago
2006
IEEE
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
ASPLOS
2011
ACM
13 years 20 hour ago
2011
ACM
Multicore processors have become ubiquitous in today’s systems, but exploiting the parallelism they offer remains difficult, especially for legacy application and applications ...