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ICCAD
2006
IEEE
147views Hardware» more  ICCAD 2006»
14 years 4 months ago
Analysis and modeling of CD variation for statistical static timing
Statistical static timing analysis (SSTA) has become a key method for analyzing the effect of process variation in aggressively scaled CMOS technologies. Much research has focused...
Brian Cline, Kaviraj Chopra, David Blaauw, Yu Cao
ISPASS
2010
IEEE
14 years 2 months ago
Visualizing complex dynamics in many-core accelerator architectures
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
GLVLSI
2006
IEEE
143views VLSI» more  GLVLSI 2006»
14 years 1 months ago
SACI: statistical static timing analysis of coupled interconnects
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, A...
ICASSP
2009
IEEE
14 years 2 months ago
Fast acoustic computations using graphics processors
In this paper we present a fast method for computing acoustic likelihoods that makes use of a Graphics Processing Unit (GPU). After enabling the GPU acceleration the main processo...
Paul R. Dixon, Tasuku Oonishi, Sadaoki Furui
ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
14 years 4 months ago
An accurate sparse matrix based framework for statistical static timing analysis
Statistical Static Timing Analysis has received wide attention recently and emerged as a viable technique for manufacturability analysis. To be useful, however, it is important th...
Anand Ramalingam, Gi-Joon Nam, Ashish Kumar Singh,...