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» Accelerating trace computation in post-silicon debug
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FMCAD
2008
Springer
14 years 13 days ago
BackSpace: Formal Analysis for Post-Silicon Debug
Post-silicon debug is the problem of determining what's wrong when the fabricated chip of a new design behaves incorrectly. This problem now consumes over half of the overall ...
Flavio M. de Paula, Marcel Gort, Alan J. Hu, Steve...
DAC
2009
ACM
14 years 12 months ago
Interconnection fabric design for tracing signals in post-silicon validation
Post-silicon validation has become an essential step in the design flow of today's complex integrated circuits. One effective technique that provides real-time visibility to ...
Xiao Liu, Qiang Xu
ISQED
2010
IEEE
194views Hardware» more  ISQED 2010»
14 years 5 months ago
Accelerating trace computation in post-silicon debug
— Post-silicon debug comprises a significant and highly variable fraction of the total development time for large chip designs. To accelerate post-silicon debug, BackSpace [1, 2...
Johnny J. W. Kuan, Steven J. E. Wilton, Tor M. Aam...