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ISW
2001
Springer
14 years 1 days ago
Experimental Testing of the Gigabit IPSec-Compliant Implementations of Rijndael and Triple DES Using SLAAC-1V FPGA Accelerator B
In this paper, we present the results of the first phase of a project aimed at implementing a full suite of IPSec cryptographic transformations in reconfigurable hardware. Full imp...
Pawel Chodowiec, Kris Gaj, Peter Bellows, Brian Sc...
FPL
2001
Springer
123views Hardware» more  FPL 2001»
14 years 3 days ago
Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines
This paper presents new achievements on the automatic mapping of algorithms, written in imperative software programming languages, to custom computing machines. The reconfigurable ...
João M. P. Cardoso, Horácio C. Neto
ERSA
2006
150views Hardware» more  ERSA 2006»
13 years 9 months ago
An Area Time Efficient Field Programmable Mersenne Twister Uniform Random Number Generator
Reconfigurable computing offers an attractive solution to accelerating infrared scene simulations. In infrared scene simulations, the modeling of a number of atmospheric and optic...
Vinay Sriram, David Kearney
WSCG
2003
145views more  WSCG 2003»
13 years 9 months ago
Real-Time Soft Shadows Using a Single Light Sample
We present a real-time rendering algorithm that generates soft shadows of dynamic scenes using a single light sample. As a depth-map algorithm it can handle arbitrary shadowed sur...
Florian Kirsch, Jürgen Döllner
DAC
2001
ACM
14 years 8 months ago
Hardware/Software Instruction Set Configurability for System-on-Chip Processors
New application-focused system-on-chip platforms motivate new application-specific processors. Configurable and extensible processor architectures offer the efficiency of tuned lo...
Albert Wang, Earl Killian, Dror E. Maydan, Chris R...