We present a configuration technique for a Large Area Integrated Circuit (LAIC) which is manufactured by wafer stepping. A LAIC consists of four identical subsystems, i.e., a subs...
Markus Rudack, Michael Redeker, Dieter Treytnar, O...
Software-defined networks (SDNs) are a new implementation architecture in which a controller machine manages a distributed collection of switches, by instructing them to install ...
Christopher Monsanto, Nate Foster, Rob Harrison, D...
Compute unified device architecture (CUDA) is a software development platform that allows us to run C-like programs on the nVIDIA graphics processing unit (GPU). This paper prese...
Early embedded SW development with transaction-level models has been broadly promoted to improve SoC design productivity. But the proposed APIs only provide low-level read/write o...
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...