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» Achievable Performance of Digital Watermarking Systems
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FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 7 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
ISCA
2007
IEEE
149views Hardware» more  ISCA 2007»
14 years 1 months ago
Virtual private caches
Virtual Private Machines (VPM) provide a framework for Quality of Service (QoS) in CMP-based computer systems. VPMs incorporate microarchitecture mechanisms that allow shares of h...
Kyle J. Nesbit, James Laudon, James E. Smith
CODES
2005
IEEE
14 years 1 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
EUROSYS
2006
ACM
14 years 4 months ago
Reducing TCB complexity for security-sensitive applications: three case studies
The large size and high complexity of securitysensitive applications and systems software is a primary cause for their poor testability and high vulnerability. One approach to all...
Lenin Singaravelu, Calton Pu, Hermann Härtig,...
ASPLOS
2009
ACM
14 years 8 months ago
TwinDrivers: semi-automatic derivation of fast and safe hypervisor network drivers from guest OS drivers
In a virtualized environment, device drivers are often run inside a virtual machine (VM) rather than in the hypervisor, for reasons of safety and reduction in software engineering...
Aravind Menon, Simon Schubert, Willy Zwaenepoel