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HPCA
2005
IEEE
14 years 2 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
IEEEPACT
2005
IEEE
14 years 2 months ago
Performance Analysis of System Overheads in TCP/IP Workloads
Current high-performance computer systems are unable to saturate the latest available high-bandwidth networks such as 10 Gigabit Ethernet. A key obstacle in achieving 10 gigabits ...
Nathan L. Binkert, Lisa R. Hsu, Ali G. Saidi, Rona...
IPPS
2005
IEEE
14 years 2 months ago
High-Performance Direct Pairwise Comparison of Large Genomic Sequences
Many applications in Comparative Genomics lend themselves to implementations that take advantage of common high-performance features in modern microprocessors. However, the common...
Christopher Mueller, Mehmet M. Dalkilic, Andrew Lu...
MSS
2005
IEEE
84views Hardware» more  MSS 2005»
14 years 2 months ago
Using MEMS-Based Storage to Boost Disk Performance
Non-volatile storage technologies such as flash memory, Magnetic RAM (MRAM), and MEMS-based storage are emerging as serious alternatives to disk drives. Among these, MEMS storage...
Feng Wang 0003, Bo Hong, Scott A. Brandt, Darrell ...
ASPDAC
2005
ACM
73views Hardware» more  ASPDAC 2005»
14 years 2 months ago
An-OARSMan: obstacle-avoiding routing tree construction with good length performance
- Routing is one of the important steps in VLSI/ULSI physical design. The rectilinear Steiner minimum tree (RSMT) construction is an essential part of routing. Since macro cells, I...
Yu Hu, Tong Jing, Xianlong Hong, Zhe Feng 0002, Xi...