11384 search results - page 18 / 2277 » Achieved IPC Performance |
MICRO
2000
IEEE
14 years 1 months ago
2000
IEEE
Current superscalar microprocessors’ performance depends on its frequency and the number of useful instructions that can be processed per cycle (IPC). In this paper we propose a...
EUROPAR
1997
Springer
14 years 6 days ago
1997
Springer
Abstract. The serialization constraints induced by the detection and enforcement of true data dependences have always been regarded as requirements for correct execution. We propos...
MICRO
2010
IEEE
13 years 7 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
CF
2004
ACM
14 years 2 months ago
2004
ACM
Current instruction fetch policies in SMT processors are oriented towards optimization of overall throughput and/or fairness. However, they provide no control over how individual ...
IEEEPACT
2009
IEEE
14 years 3 months ago
2009
IEEE
—Shared cache allocation policies play an important role in determining CMP performance. The simplest policy, LRU, allocates cache implicitly as a consequence of its replacement ...