Sciweavers

11384 search results - page 58 / 2277
» Achieved IPC Performance
Sort
View
ICS
2001
Tsinghua U.
14 years 1 months ago
Integrating superscalar processor components to implement register caching
A large logical register file is important to allow effective compiler transformations or to provide a windowed space of registers to allow fast function calls. Unfortunately, a l...
Matt Postiff, David Greene, Steven E. Raasch, Trev...
ISCA
2000
IEEE
93views Hardware» more  ISCA 2000»
14 years 10 days ago
Reconfigurable caches and their application to media processing
High performance general-purpose processors are increasingly being used for a variety of application domains scienti c, engineering, databases, and more recently, media processing...
Parthasarathy Ranganathan, Sarita V. Adve, Norman ...
TC
2010
13 years 7 months ago
Design and Analysis of On-Chip Networks for Large-Scale Cache Systems
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...
Yuho Jin, Eun Jung Kim, Ki Hwan Yum
INFOCOM
2010
IEEE
13 years 7 months ago
Analyzing the Performance of Greedy Maximal Scheduling via Local Pooling and Graph Theory
—Efficient operation of wireless networks and switches requires using simple (and in some cases distributed) scheduling algorithms. In general, simple greedy algorithms (known a...
Berk Birand, Maria Chudnovsky, Bernard Ries, Paul ...
CGO
2006
IEEE
14 years 2 months ago
Fast and Effective Orchestration of Compiler Optimizations for Automatic Performance Tuning
Although compile-time optimizations generally improve program performance, degradations caused by individual techniques are to be expected. One promising research direction to ove...
Zhelong Pan, Rudolf Eigenmann