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MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
14 years 3 months ago
A novel cache architecture with enhanced performance and security
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
Zhenghong Wang, Ruby B. Lee
JNCA
2008
86views more  JNCA 2008»
13 years 8 months ago
Performance comparisons of load balancing algorithms for I/O-intensive workloads on clusters
Load balancing techniques play a critically important role in developing high-performance cluster computing platforms. Existing load balancing approaches are concerned with the ef...
Xiao Qin
SC
2009
ACM
14 years 3 months ago
Bridging parallel and reconfigurable computing with multilevel PGAS and SHMEM+
Reconfigurable computing (RC) systems based on FPGAs are becoming an increasingly attractive solution to building parallel systems of the future. Applications targeting such syste...
Vikas Aggarwal, Alan D. George, K. Yalamanchili, C...
JUCS
2006
185views more  JUCS 2006»
13 years 8 months ago
The Berlin Brain-Computer Interface: Machine Learning Based Detection of User Specific Brain States
We outline the Berlin Brain-Computer Interface (BBCI), a system which enables us to translate brain signals from movements or movement intentions into control commands. The main co...
Benjamin Blankertz, Guido Dornhege, Steven Lemm, M...
IPPS
2005
IEEE
14 years 2 months ago
Energy-Aware Task Scheduling: Towards Enabling Mobile Computing over MANETs
Enabling high performance, persistent mobile computing has recently become a very active research area. The widespread popularity of mobile computing devices, such as laptops, han...
Waleed Alsalih, Selim G. Akl, Hossam S. Hassanein