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» Achieving High Performance with FPGA-Based Computing
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IPPS
2008
IEEE
14 years 3 months ago
Massive supercomputing coping with heterogeneity of modern accelerators
Heterogeneous supercomputers with combined general purpose and accelerated CPUs promise to be the future major architecture due to their wideranging generality and superior perfor...
Toshio Endo, Satoshi Matsuoka
IPPS
2006
IEEE
14 years 2 months ago
Pipelined broadcast on Ethernet switched clusters
We consider unicast-based pipelined broadcast schemes for clusters connected by multiple Ethernet switches. By splitting a large broadcast message into segments and broadcasting t...
Pitch Patarasuk, Ahmad Faraj, Xin Yuan
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
13 years 10 months ago
Fault tolerant nanoelectronic processor architectures
In this paper we propose a fault-tolerant processor architecture and an associated fault-tolerant computation model capable of fault tolerance in the nanoelectronic environment th...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
ICIP
2005
IEEE
14 years 10 months ago
Improved schemes for inter-frame coding in the H.264/AVC standard
An efficient algorithm for inter-frame coding in the H.264/AVC standard is extended to provide more significant speedup in computational performance for sequences containing high ...
Andy C. Yu, Graham R. Martin, Heechan Park
DAC
2003
ACM
14 years 9 months ago
Parameter variations and impact on circuits and microarchitecture
Parameter variation in scaled technologies beyond 90nm will pose a major challenge for design of future high performance microprocessors. In this paper, we discuss process, voltag...
Shekhar Borkar, Tanay Karnik, Siva Narendra, James...