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CF
2009
ACM
14 years 3 months ago
Mapping the LU decomposition on a many-core architecture: challenges and solutions
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
Ioannis E. Venetis, Guang R. Gao
CODES
2006
IEEE
14 years 2 months ago
Integrated analysis of communicating tasks in MPSoCs
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
Simon Schliecker, Matthias Ivers, Rolf Ernst
EMSOFT
2005
Springer
14 years 2 months ago
Compiler-guided register reliability improvement against soft errors
With the scaling of technology, transient errors caused by external particle strikes have become a critical challenge for microprocessor design. As embedded processors are widely ...
Jun Yan, Wei Zhang
RTCSA
2000
IEEE
14 years 27 days ago
Task attribute assignment of fixed priority scheduled tasks to reenact off-line schedules
A number of industrial applications advocate the use of time-triggered approaches for reasons of predictability, distribution, and particular constraints such as jitter or end-to-...
Radu Dobrin, Yusuf Özdemir, Gerhard Fohler
CCS
2007
ACM
14 years 15 days ago
Reconfigurable trusted computing in hardware
Trusted Computing (TC) is an emerging technology towards building trustworthy computing platforms. The Trusted Computing Group (TCG) has proposed several specifications to impleme...
Thomas Eisenbarth, Tim Güneysu, Christof Paar...