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FSTTCS
2000
Springer
14 years 4 days ago
Model Checking CTL Properties of Pushdown Systems
: A pushdown system is a graph G(P) of configurations of a pushdown automaton P. The model checking problem for a logic L is: given a pushdown automaton P and a formula L decide ...
Igor Walukiewicz
VLSID
2004
IEEE
91views VLSI» more  VLSID 2004»
14 years 9 months ago
Program Slicing for ATPG-Based Property Checking
This paper presents a novel technique for abstracting designs in order to increase the efficiency of formal property checking. Bounded Model Checking (BMC), using Satisfiability (...
Vivekananda M. Vedula, Whitney J. Townsend, Jacob ...
FDL
2003
IEEE
14 years 1 months ago
Using Symbolic Simulation for Bounded Property Checking
Assuring correctness of digital designs is one of the major tasks in the system design flow. Formal methods have been proposed to accompany commonly used simulation approaches. I...
Jürgen Ruf, Prakash Mohan Peranandam, Thomas ...
ICSOC
2007
Springer
14 years 2 months ago
Verifying Temporal and Epistemic Properties of Web Service Compositions
Model checking Web service behaviour has remained limited to checking safety and liveness properties. However when viewed as a multi agent system, the system composition can be ana...
Alessio Lomuscio, Hongyang Qu, Marek J. Sergot, Mo...
CHARME
2005
Springer
136views Hardware» more  CHARME 2005»
14 years 2 months ago
Acceleration of SAT-Based Iterative Property Checking
Today, verification is becoming the dominating factor for successful circuit designs. In this context formal verification techniques allow to prove the correctness of a circuit ...
Daniel Große, Rolf Drechsler