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» Activity Estimation for Field-Programmable Gate Arrays
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HICSS
2007
IEEE
112views Biometrics» more  HICSS 2007»
14 years 1 months ago
Hardware-Assisted Scanning for Signature Patterns in Image File Fragments
The ability to detect fragments of deleted image files and to reconstruct these image files from all available fragments on disk is an important activity in the field of digital f...
Yoginder S. Dandass
CCECE
2006
IEEE
14 years 1 months ago
Towards the System-on-Chip Realization of a Sensorless Vector Controller with Microsecond-order Computation Time
— The aim of this research is to implement sensorless vector control algorithms on a single, eventually reconfigurable, chip, with a computation timing constraint of, at most, 1...
Rachid Beguenane, Jean-Gabriel Mailloux, Sté...
FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
14 years 3 days ago
A crosstalk-aware timing-driven router for FPGAs
As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstal...
Steven J. E. Wilton
ERSA
2007
142views Hardware» more  ERSA 2007»
13 years 9 months ago
An FPGA Implementation of Reciprocal Sums for SPME
Molecular Dynamics simulations have become an interesting target for acceleration using Field-Programmable Gate Arrays (FPGA). Still to be attempted completely in FPGA hardware is...
Sam Lee, Paul Chow
ASAP
2007
IEEE
123views Hardware» more  ASAP 2007»
13 years 9 months ago
Estimating Area Costs of Custom Instructions for FPGA-based Reconfigurable Processors
FPGA (Field Programmable Gate Array) based reconfigurable processor has been shown to meet the increasingly challenging performance targets and shorter time-to-market pressures. I...
Siew Kei Lam, Thambipillai Srikanthan