433 search results - page 49 / 87 » Activity-driven clock design for low power circuits |
159
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ISCAS
2008
IEEE
16 years 11 days ago
2008
IEEE
Abstract— This paper presents circuits that enable dynamic voltage and frequency scaling (DVFS) for finegrained chip multi-processors to reduce both dynamic and leakage power di...
120
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DATE
2008
IEEE
16 years 13 days ago
2008
IEEE
This paper presents the design and the laboratory results of an integrated half-bridge driver for power electronic systems in a 0.35 µm Bipolar CMOS DMOS (BCD) technology. The pr...
130
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
Asynchronous circuits are increasingly attractive as low power or high-performance replacements to synchronous designs. A key part of these circuits are asynchronous micropipeline...
129
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ISLPED
2009
ACM
16 years 14 days ago
2009
ACM
This paper explores the use of serial circuits for ultra-low-power sub-threshold systems. A serial system leads to a smaller design and higher utilization, yielding 40% active ene...
164
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DAC
2006
ACM
16 years 7 months ago
2006
ACM
Designing an energy efficient power gating structure is an important and challenging task in Multi-Threshold CMOS (MTCMOS) circuit design. In order to achieve a very low power des...