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RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
14 years 2 months ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
FPGA
1995
ACM
118views FPGA» more  FPGA 1995»
14 years 5 days ago
An SBus Monitor Board
During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. I...
H. A. Xie, Kevin E. Forward, K. M. Adams, D. Leask
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
14 years 28 days ago
CRUSADE: Hardware/Software Co-Synthesis of Dynamically Reconfigurable Heterogeneous Real-Time Distributed Embedded Systems
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
Bharat P. Dav
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 5 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
IWMM
2007
Springer
116views Hardware» more  IWMM 2007»
14 years 2 months ago
Heap space analysis for java bytecode
This article presents a heap space analysis for (sequential) Java bytecode. The analysis generates heap space cost relations which define at compile-time the heap consumption of ...
Elvira Albert, Samir Genaim, Miguel Gómez-Z...