46 search results - page 3 / 10 » Adaptive FPGAs: High-Level Architecture and a Synthesis Meth... |
ASPDAC
1995
ACM
13 years 11 months ago
1995
ACM
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
ASAP
1996
IEEE
13 years 11 months ago
1996
IEEE
A datapath synthesis system (DPSS) for a bus-based wavefront array architecture, called rDPA (reconfigurable datapath architecture), is presented. An internal data bus to the arra...
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
High level synthesis tools transform an algorithmic description to a register transfer language (RTL) description of the hardware. The algorithm behavior is typically described in...
FCCM
2011
IEEE
12 years 11 months ago
2011
IEEE
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
FPL
2004
Springer
14 years 21 days ago
2004
Springer
Abstract. This paper presents a new scheme for the hardware evaluation of elementary functions, based on a piecewise second order minimax approximation. The novelty is that this ev...