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HPCA
2009
IEEE
14 years 9 months ago
Dacota: Post-silicon validation of the memory subsystem in multi-core designs
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco
DATE
2002
IEEE
130views Hardware» more  DATE 2002»
14 years 1 months ago
Assigning Program and Data Objects to Scratchpad for Energy Reduction
The number of embedded systems is increasing and a remarkable percentage is designed as mobile applications. For the latter, the energy consumption is a limiting factor because of...
Stefan Steinke, Lars Wehmeyer, Bo-Sik Lee, Peter M...
ISCAS
2008
IEEE
160views Hardware» more  ISCAS 2008»
14 years 3 months ago
ATLAS: An adaptively formed hierarchical cell library based analog synthesis framework
— This paper presents ATLAS - a framework for automated analog circuit synthesis that comprises of both topology generation and subsequent circuit sizing. A hierarchically arrang...
Angan Das, Ranga Vemuri
ADAPTIVE
2007
Springer
14 years 3 months ago
Adaptive News Access
This chapter describes how the adaptive web technologies discussed in this book have been applied to news access. First, we provide an overview of different types of adaptivity in ...
Daniel Billsus, Michael J. Pazzani
PCRCW
1997
Springer
14 years 1 months ago
ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing
In recent years, theChaos Project at theUniversityofWashingtonhas analyzed and simulated a dozen routing algorithms. Three new routing algorithms have been invented; of these, the...
Neil R. McKenzie, Kevin Bolding, Carl Ebeling, Law...