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HPCA
1998
IEEE
13 years 11 months ago
PRISM: An Integrated Architecture for Scalable Shared Memory
This paper describes PRISM, a distributed sharedmemory architecture that relies on a tightly integrated hardware and operating system design for scalable and reliable performance....
Kattamuri Ekanadham, Beng-Hong Lim, Pratap Pattnai...
ASPLOS
2004
ACM
14 years 27 days ago
Continual flow pipelines
Increased integration in the form of multiple processor cores on a single die, relatively constant die sizes, shrinking power envelopes, and emerging applications create a new cha...
Srikanth T. Srinivasan, Ravi Rajwar, Haitham Akkar...
ISCA
2000
IEEE
105views Hardware» more  ISCA 2000»
13 years 12 months ago
Multiple-banked register file architectures
The register file access time is one of the critical delays in current superscalar processors. Its impact on processor performance is likely to increase in future processor genera...
José-Lorenzo Cruz, Antonio González,...
IWMM
2007
Springer
110views Hardware» more  IWMM 2007»
14 years 1 months ago
Path: page access tracking to improve memory management
Traditionally, operating systems use a coarse approximation of memory accesses to implement memory management algorithms by monitoring page faults or scanning page table entries. ...
Reza Azimi, Livio Soares, Michael Stumm, Thomas Wa...
HPDC
1999
IEEE
13 years 11 months ago
Dodo: A User-level System for Exploiting Idle Memory in Workstation Clusters
In this paper, we present the design and implementation of Dodo, an e cient user-level system for harvesting idle memory in o -the-shelf clusters of workstations. Dodo enables dat...
Samir Koussih, Anurag Acharya, Sanjeev Setia