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CODES
2005
IEEE
14 years 3 months ago
Satisfying real-time constraints with custom instructions
Instruction-set extensible processors allow an existing processor core to be extended with application-specific custom instructions. In this paper, we explore a novel application...
Pan Yu, Tulika Mitra
EMSOFT
2004
Springer
14 years 3 months ago
An approach for integrating basic retiming and software pipelining
Basic retiming is an algorithm originally developed for hardware optimization. Software pipelining is a technique proposed to increase instruction-level parallelism for parallel p...
Noureddine Chabini, Wayne Wolf
CASES
2004
ACM
14 years 3 months ago
Procedure placement using temporal-ordering information: dealing with code size expansion
Abstract— In a direct-mapped instruction cache, all instructions that have the same memory address modulo the cache size, share a common and unique cache slot. Instruction cache ...
Christophe Guillon, Fabrice Rastello, Thierry Bida...
ICASSP
2008
IEEE
14 years 4 months ago
Scalable H.264 wireless video transmission using quasi-orthogonal space-time block codes
We propose a low-delay low-complexity end-to-end video transmission system that integrates the latest scalable H.264 codec and the full-rate full-diversity quasi-orthogonal space-...
Mohammad K. Jubran, Manu Bansal, Lisimachos P. Kon...
ICCD
1999
IEEE
130views Hardware» more  ICCD 1999»
14 years 2 months ago
Preference-Driven Hierarchical Hardware/Software Partitioning
In this paper, we present a hierarchical evolutionary approach to hardware/software partitioning for real-time embedded systems. In contrast to most of previous approaches, we app...
Gang Quan, Xiaobo Hu, Garrison W. Greenwood