23590 search results - page 42 / 4718 » Algorithm Performance Contest |
SODA
2008
ACM
13 years 10 months ago
2008
ACM
This paper presents a multicore-cache model that reflects the reality that multicore processors have both per-processor private (L1) caches and a large shared (L2) cache on chip. ...
IJCSA
2008
13 years 9 months ago
2008
: Performance of Natural Language Interface often deteriorates due to linguistic phenomena of Semantic Symmetry and Ambiguous Modification (Katz and Lin, 2003). In this paper we pr...
PPSN
2004
Springer
14 years 2 months ago
2004
Springer
Formula One motor racing is a rich sport that spends millions on research and development of highly optimized cars. Here we describe the use of a genetic algorithm to optimize 66 s...
INFOCOM
2005
IEEE
14 years 2 months ago
2005
IEEE
— This paper is about high capacity switches and routers that give guaranteed throughput, rate and delay guarantees. Many routers are built using input queueing or combined input...
TVLSI
2010
13 years 3 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...