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MICRO
2010
IEEE
175views Hardware» more  MICRO 2010»
13 years 7 months ago
Efficient Selection of Vector Instructions Using Dynamic Programming
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...
Rajkishore Barik, Jisheng Zhao, Vivek Sarkar
OSDI
2000
ACM
13 years 11 months ago
Surplus Fair Scheduling: A Proportional-Share CPU Scheduling Algorithm for Symmetric Multiprocessors
In this paper, we present surplus fair scheduling (SFS), a proportional-share CPU scheduler designed for symmetric multiprocessors. We first show that the infeasibility of certain...
Abhishek Chandra, Micah Adler, Pawan Goyal, Prasha...
VLSID
2002
IEEE
192views VLSI» more  VLSID 2002»
14 years 2 months ago
Static and Dynamic Variable Voltage Scheduling Algorithms for Real-Time Heterogeneous Distributed Embedded Systems
à This paper addresses the problem of static and dynamic variable voltage scheduling of multi-rate periodic task graphs (i.e., tasks with precedence relationships) and aperiodic t...
Jiong Luo, Niraj K. Jha
CLUSTER
2006
IEEE
13 years 10 months ago
A taxonomy of application scheduling tools for high performance cluster computing
Application scheduling plays an important role in high-performance cluster computing. Application scheduling can be classified as job scheduling and task scheduling. This paper pre...
Jiannong Cao, Alvin T. S. Chan, Yudong Sun, Sajal ...
ECRTS
2007
IEEE
14 years 4 months ago
Tardiness Bounds for FIFO Scheduling on Multiprocessors
FIFO scheduling is often considered to be inappropriate for scheduling workloads that are subject to timing constraints. However, FIFO is implemented in many generalpurpose OSs, a...
Hennadiy Leontyev, James H. Anderson