Sciweavers

119 search results - page 16 / 24
» Algorithmic and Architectural Design Methodology for Particl...
Sort
View
DATE
2008
IEEE
145views Hardware» more  DATE 2008»
14 years 2 months ago
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
Mohammad Abdullah Al Faruque, Jörg Henkel
ENTCS
2006
163views more  ENTCS 2006»
13 years 8 months ago
Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC
In recent years several successful GALS realizations have been presented. The core of a GALS system is a locally synchronous island that is designed using industry standard synchr...
Frank K. Gürkaynak, Stephan Oetiker, Hubert K...
SPAA
2006
ACM
14 years 1 months ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
WOSP
1998
ACM
14 years 5 days ago
Poems: end-to-end performance design of large parallel adaptive computational systems
The POEMS project is creating an environment for end-to-end performance modeling of complex parallel and distributed systems, spanning the domains of application software, runti...
Ewa Deelman, Aditya Dube, Adolfy Hoisie, Yong Luo,...
DAC
2004
ACM
14 years 9 months ago
Compact thermal modeling for temperature-aware design
Thermal design in sub-100nm technologies is one of the major challenges to the CAD community. In this paper, we first introduce the idea of temperature-aware design. We then propo...
Wei Huang, Mircea R. Stan, Kevin Skadron, Karthik ...