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» Aligators for Arrays (Tool Paper)
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FPL
2004
Springer
93views Hardware» more  FPL 2004»
14 years 27 days ago
The Impact of Pipelining on Energy per Operation in Field-Programmable Gate Arrays
This paper investigates experimentally the quantitative impact of pipelining on energy per operation for two representative FPGA devices: a 0.13µm CMOS high density/high speed FPG...
Steven J. E. Wilton, Su-Shin Ang, Wayne Luk
FPL
2004
Springer
101views Hardware» more  FPL 2004»
14 years 27 days ago
Automatic Creation of Reconfigurable PALs/PLAs for SoC
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run -time reconfigurabil...
Mark Holland, Scott Hauck
DAC
2008
ACM
13 years 9 months ago
Programmable logic circuits based on ambipolar CNFET
Recently, it was demonstrated that the polarity of carbon nanotube field effect transistors can be electrically controlled. In this paper we show how Programmable Logic Arrays (PL...
M. Haykel Ben Jamaa, David Atienza, Yusuf Leblebic...
MOMM
2006
ACM
122views Communications» more  MOMM 2006»
14 years 1 months ago
Multimedia Tools for Teaching Reconfigurable Systems
Multimedia tools provide significant assistance in vast variety of different areas and one of them is education. The paper shows that such tools are especially important for const...
Valery Sklyarov, Iouliia Skliarova
DFT
2005
IEEE
110views VLSI» more  DFT 2005»
14 years 1 months ago
A design flow for protecting FPGA-based systems against single event upsets
SRAM-based Field Programmable Gate Arrays (FPGAs) are very susceptible to Single Event Upsets (SEUs) that may have dramatic effects on the circuits they implement. In this paper w...
Luca Sterpone, Massimo Violante