Sciweavers

26 search results - page 5 / 6
» All-du-path Coverage for Parallel Programs
Sort
View
DSN
2007
IEEE
14 years 4 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
IEEEPACT
2005
IEEE
14 years 3 months ago
Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors
This paper proposes a new hardware technique for using one core of a CMP to prefetch data for a thread running on another core. Our approach simply executes a copy of all non-cont...
Ilya Ganusov, Martin Burtscher
BMCBI
2010
133views more  BMCBI 2010»
13 years 10 months ago
Consolidating metabolite identifiers to enable contextual and multi-platform metabolomics data analysis
Background: Analysis of data from high-throughput experiments depends on the availability of well-structured data that describe the assayed biomolecules. Procedures for obtaining ...
Henning Redestig, Miyako Kusano, Atsushi Fukushima...
ICS
2010
Tsinghua U.
13 years 11 months ago
Timing local streams: improving timeliness in data prefetching
Data prefetching technique is widely used to bridge the growing performance gap between processor and memory. Numerous prefetching techniques have been proposed to exploit data pa...
Huaiyu Zhu, Yong Chen, Xian-He Sun
ASPLOS
2006
ACM
14 years 3 months ago
Ultra low-cost defect protection for microprocessor pipelines
The sustained push toward smaller and smaller technology sizes has reached a point where device reliability has moved to the forefront of concerns for next-generation designs. Sil...
Smitha Shyam, Kypros Constantinides, Sujay Phadke,...