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139
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APCCAS
2006
IEEE
15 years 10 months ago
2006
IEEE
— We present a design technique for implementing asynchronous ALUs with CMOS domino logic and delay insensitive dual rail four-phase logic. It ensures economy in silicon area and...
HPCN
1999
Springer
15 years 8 months ago
1999
Springer
Abstract. The parallel implementation of GCR is addressed, with particular focus on communication costs associated with orthogonalization processes. This consideration brings up qu...
114
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FPGA
2007
ACM
15 years 10 months ago
2007
ACM
A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
114
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APCCAS
2006
IEEE
15 years 10 months ago
2006
IEEE
We described an H.264 decoder implemented with our design methodology, in which a system function model of transaction level is first captured in SystemC and refined into RTL with ...
129
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SYNASC
2005
IEEE
15 years 10 months ago
2005
IEEE
The purpose of this paper is to present the main characteristics of ADF, an open source agent developing platform with a focus on agent collaboration. The basic architecture of th...