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131
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IPPS
2007
IEEE
15 years 10 months ago
Exploring a Multithreaded Methodology to Implement a Network Communication Protocol on the Cyclops-64 Multithreaded Architecture
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...
Ge Gan, Ziang Hu, Juan del Cuvillo, Guang R. Gao
116
Voted
DATE
2000
IEEE
78views Hardware» more  DATE 2000»
15 years 8 months ago
HW/SW Codesign of an Engine Management System
The design process for an engine management system is presented. The functional specification of the system has been captured using C and C++ as specification languages. The val...
Massimo Baleani, Alberto Ferrari, Alberto L. Sangi...
129
Voted
DAC
2010
ACM
15 years 3 months ago
Virtual channels vs. multiple physical networks: a comparative analysis
Packet-switched networks-on-chip (NoC) have been proposed as an efficient communication infrastructure for multi-core architectures. Adding virtual channels to a NoC helps to avoi...
Young-Jin Yoon, Nicola Concer, Michele Petracca, L...
137
Voted
ICWE
2005
Springer
15 years 9 months ago
The Role of Visual Tools in a Web Application Design and Verification Framework: A Visual Notation for LTL Formulae
As the Web becomes a platform for implementing complex B2C and B2B applications, there is a need to extend Web conceptual modeling to process-centric applications. In this context,...
Marco Brambilla, Alin Deutsch, Liying Sui, Victor ...
130
Voted
FPGA
2004
ACM
174views FPGA» more  FPGA 2004»
15 years 9 months ago
A compiled accelerator for biological cell signaling simulations
The simulation of large systems of biochemical reactions is a key part of research into molecular signaling and information processing in biological cells. However, it can be impr...
John F. Keane, Christopher Bradley, Carl Ebeling