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VLSID
2006
IEEE
169views VLSI» more  VLSID 2006»
16 years 4 months ago
A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks
The two dominant architectural choices for implementing efficient communication fabrics for SoC's have been transaction-based buses and packet-based Networks-onChip (NoC). Bo...
Thomas D. Richardson, Chrysostomos Nicopoulos, Don...
ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
15 years 10 months ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon
NOCS
2007
IEEE
15 years 10 months ago
A Hybrid Analog-Digital Routing Network for NoC Dynamic Routing
Dynamic routing can substantially enhance the quality of service for multiprocessor communication, and can provide intelligent adaptation of faulty links during run time. Implemen...
Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. C...
FDL
2007
IEEE
15 years 10 months ago
How Different are Esterel and SystemC?
In this paper, we compare the underlying models of computation of the system description languages SystemC and Esterel. Although these languages have a rather different origin, we...
Jens Brandt, Klaus Schneider
DATE
2000
IEEE
140views Hardware» more  DATE 2000»
15 years 8 months ago
Resolution of Dynamic Memory Allocation and Pointers for the Behavioral Synthesis from C
-- One of the greatest challenges in C/C++-based design methodology is to efficiently map C/C++ models into hardware. Many of the networking and multimedia applications implemente...
Luc Séméria, Koichi Sato, Giovanni D...