Sciweavers

166 search results - page 7 / 34
» An Adaptive Issue Queue for Reduced Power at High Performanc...
Sort
View
ICCAD
2010
IEEE
158views Hardware» more  ICCAD 2010»
13 years 5 months ago
Novel binary linear programming for high performance clock mesh synthesis
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
Minsik Cho, David Z. Pan, Ruchir Puri
MONET
2007
126views more  MONET 2007»
13 years 7 months ago
Performance Evaluation of a Power Management Scheme for Disruption Tolerant Network
Disruption Tolerant Network (DTN) is characterized by frequent partitions and intermittent connectivity. Power management issue in such networks is challenging. Existing power man...
Yong Xi, Mooi Choo Chuah, K. Chang
IPPS
2005
IEEE
14 years 1 months ago
A Cross-Layer Approach for Power-Performance Optimization in Distributed Mobile Systems
The next generation of mobile systems with multimedia processing capabilities and wireless connectivity will be increasingly deployed in highly dynamic and distributed environment...
Shivajit Mohapatra, Radu Cornea, Hyunok Oh, Kyoung...
HPCA
2003
IEEE
14 years 8 months ago
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
Russ Joseph, David Brooks, Margaret Martonosi
VTC
2006
IEEE
175views Communications» more  VTC 2006»
14 years 1 months ago
Performance of an Adaptive Multiuser OFDM Uplink with Carrier Frequency Offsets
Using an OFDM based uplink for the future cellular network has been a controversial issue due to difficulties in time and frequency synchronization and high Peak-to-Average Power...
Wei Wang, Tony Ottosson, Tommy Svensson