144 search results - page 1 / 29 » An Advanced Optimizer for the IA-64 Architecture |
MICRO
2000
IEEE
13 years 10 months ago
2000
IEEE
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
TPHOL
2000
IEEE
14 years 2 months ago
2000
IEEE
This paper outlines a formal model of the Intel IA-64 architecture, and explains how this model can be used to verify the correctness of assembly-level code optimizations. The form...
EUROPAR
2004
Springer
14 years 4 months ago
2004
Springer
Abstract. The features of the IA64 architecture create new opportunities for link-time optimization. At the same time they complicate the design of a link-time optimizer. This pape...
LCTRTS
2001
Springer
14 years 3 months ago
2001
Springer
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
CCGRID
2006
IEEE
14 years 5 months ago
2006
IEEE
Advanced accelerator simulations have played a prominent role in the design and analysis of modern accelerators. Given that accelerator simulations are computational intensive and...