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DAC
2006
ACM
14 years 9 months ago
Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction
Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
Yu Hu, Yan Lin, Lei He, Tim Tuan
ICASSP
2010
IEEE
13 years 8 months ago
Large margin estimation of n-gram language models for speech recognition via linear programming
We present a novel discriminative training algorithm for n-gram language models for use in large vocabulary continuous speech recognition. The algorithm uses large margin estimati...
Vladimir Magdin, Hui Jiang
ISCAS
2003
IEEE
131views Hardware» more  ISCAS 2003»
14 years 1 months ago
Process variation dimension reduction based on SVD
We propose an algorithm based on singular value decomposition (SVD) to reduce the number of process variation variables. With few process variation variables, fault simulation and...
Zhuo Li, Xiang Lu, Weiping Shi
TIP
2010
182views more  TIP 2010»
13 years 3 months ago
Flexible Manifold Embedding: A Framework for Semi-Supervised and Unsupervised Dimension Reduction
We propose a unified manifold learning framework for semi-supervised and unsupervised dimension reduction by employing a simple but effective linear regression function to map the ...
Feiping Nie, Dong Xu, Ivor Wai-Hung Tsang, Changsh...
BMCBI
2010
243views more  BMCBI 2010»
13 years 8 months ago
Comparative study of unsupervised dimension reduction techniques for the visualization of microarray gene expression data
Background: Visualization of DNA microarray data in two or three dimensional spaces is an important exploratory analysis step in order to detect quality issues or to generate new ...
Christoph Bartenhagen, Hans-Ulrich Klein, Christia...