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» An Algorithm for the Reduction of Linear DAE
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JOC
2002
99views more  JOC 2002»
13 years 8 months ago
The Insecurity of the Digital Signature Algorithm with Partially Known Nonces
We present a polynomial-time algorithm that provably recovers the signer's secret DSA key when a few bits of the random nonces k (used at each signature generation) are known ...
Phong Q. Nguyen, Igor Shparlinski
DATE
2010
IEEE
163views Hardware» more  DATE 2010»
14 years 1 months ago
Enhanced Q-learning algorithm for dynamic power management with performance constraint
- This paper presents a novel power management techniques based on enhanced Q-learning algorithms. By exploiting the submodularity and monotonic structure in the cost function of a...
Wei Liu, Ying Tan, Qinru Qiu
FPL
2006
Springer
115views Hardware» more  FPL 2006»
14 years 11 days ago
A Congestion Driven Placement Algorithm for FPGA Synthesis
We introduce a new congestion driven placement algorithm for FPGAs in which the overlappingeffect of boundingboxes is taken into consideration. Experimental results show that comp...
Yue Zhuo, Hao Li, Saraju P. Mohanty
ICCD
2004
IEEE
103views Hardware» more  ICCD 2004»
14 years 5 months ago
A Fast Delay Analysis Algorithm for The Hybrid Structured Clock Network
This paper presents a novel approach to reducing the complexity of the transient linear circuit analysis for a hybrid structured clock network. Topology reduction is first used to...
Yi Zou, Yici Cai, Qiang Zhou, Xianlong Hong, Sheld...
AVBPA
2003
Springer
121views Biometrics» more  AVBPA 2003»
14 years 1 months ago
Enhanced VQ-Based Algorithms for Speech Independent Speaker Identification
Abstract. Weighted distance measure and discriminative training are two different approaches to enhance VQ-based solutions for speaker identification. To account for varying import...
Ningping Fan, Justinian P. Rosca