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» An Analysis of Delay Based PUF Implementations on FPGA
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RSP
2003
IEEE
176views Control Systems» more  RSP 2003»
14 years 29 days ago
Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment
This paper describes the early analysis and estimation features currently implemented in the Berkeley Emulation Engine (BEE) system. BEE is an integrated rapid prototyping and des...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, A...
CHES
2006
Springer
152views Cryptology» more  CHES 2006»
13 years 11 months ago
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style
In recent years, some countermeasures against Differential Power Analysis (DPA) at the logic level have been proposed. At CHES 2005 conference, Popp and Mangard proposed a new coun...
Daisuke Suzuki, Minoru Saeki
ICMCS
2006
IEEE
194views Multimedia» more  ICMCS 2006»
14 years 1 months ago
An Architecture Design of Threshold-Based Best-Basis Algorithm
The best-basis algorithm has gained much importance on textured-based image compression and denoising of signals. In this paper, an architecture for the wavelet-packet based best-...
S. Mayilavelane Aroutchelvame, Kaamran Raahemifar
JSAC
2007
81views more  JSAC 2007»
13 years 7 months ago
Packet Prioritization in Multihop Latency Aware Scheduling for Delay Constrained Communication
— This paper addresses the problem of optimizing the packet transmission schedule in a multihop wireless network with end-to-end delay constraints. The emphasis is to determine t...
Ben Liang, Min Dong
FPGA
2007
ACM
122views FPGA» more  FPGA 2007»
14 years 1 months ago
The shunt: an FPGA-based accelerator for network intrusion prevention
Today’s network intrusion prevention systems (IPSs) must perform increasingly sophisticated analysis—parsing protocols and interpreting application dialogs rather than simply ...
Nicholas Weaver, Vern Paxson, José M. Gonz&...