161 search results - page 9 / 33 » An Analysis of Delay Based PUF Implementations on FPGA |
ICPP
1999
IEEE
13 years 12 months ago
1999
IEEE
The implementation of bounded-delay services over integrated services networks relies admission control mechanisms that in turn use end-to-end delay computation algorithms. For gu...
DDECS
2007
IEEE
14 years 2 months ago
2007
IEEE
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
— We propose Differential Power Analysis (DPA) with a phase-based waveform matching technique. Conventionally, a trigger signal and a system clock are used to capture the wavefor...
AHS
2006
IEEE
14 years 1 months ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
CCECE
2006
IEEE
14 years 1 months ago
2006
IEEE
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...