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» An Analytical Approach to Floorplan Design and Optimization
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ICCAD
2008
IEEE
89views Hardware» more  ICCAD 2008»
14 years 4 months ago
Temperature aware task sequencing and voltage scaling
Abstract—On-chip power density and temperature are rising exponentially with decreasing feature sizes. This alarming trend calls for temperature management at every level of syst...
Ramkumar Jayaseelan, Tulika Mitra
ICCCN
2008
IEEE
14 years 2 months ago
Energy Minimization through Network Coding for Lifetime Constrained Wireless Networks
— Energy management is the key issue in the design and operation of wireless network applications like sensor networks, pervasive computing and ubiquitous computing where the net...
Nishanth Gaddam, Sudha Anil Gathala, David Lastine...
ICCAD
2010
IEEE
158views Hardware» more  ICCAD 2010»
13 years 5 months ago
Novel binary linear programming for high performance clock mesh synthesis
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
Minsik Cho, David Z. Pan, Ruchir Puri
PPOPP
2010
ACM
14 years 2 months ago
An adaptive performance modeling tool for GPU architectures
This paper presents an analytical model to predict the performance of general-purpose applications on a GPU architecture. The model is designed to provide performance information ...
Sara S. Baghsorkhi, Matthieu Delahaye, Sanjay J. P...
CODES
2008
IEEE
14 years 2 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava